RISC-V is designed to be an extensible instruction set, where the base is very minimal and reduced but a plethora of extensions exist. The ISA can be small for academic and microcontroller uses, large (more than a hundred extensions) for server uses, or anything in between.
Despite the name, a powerful RISC-V server can arguably not be considered “RISC”, though that term doesn’t have a single agreed-upon meaning and some design characteristics strongly associated with RISC still apply such as limiting memory access to dedicated load/store instructions only rather than allowing computation instructions to operate on memory.
Also, not everything is CPU instructions. Acceleration for media codecs, for example, normally means off-loading those tasks to the GPU rather than the CPU. Even if the CPU and GPU are both part of the same SoC, that doesn’t touch the CPU instruction set.







Mir is a pretty notable example. In 2013, around the same time development on Wayland sessions was picking up for the other desktops, Canonical decided to try doing their own incompatible thing and designed their own display server system to replace X for the then-upcoming version of their Unity desktop.
Ubuntu switched from Unity 7 to Gnome 3 before Unity 8 and Mir were ready, leaving both projects abandoned by Canonical and handed off to the community. Long after it had already lost what little relevance it had, Mir eventually was converted into a Wayland compositor.